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Author Topic: How to simulate Verilog-A code snippet in TINA?  (Read 3100 times)
raghuramttm
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« on: June 23, 2014, 01:31:55 AM »

Hi,

Could someone please help me in explaining how to simulate a Verilog-A code snippet in TINA?
The Verilog-A code is of a standard MOSFET.

Regards,
Raghu
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robertd1968
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« Reply #1 on: October 24, 2014, 05:05:58 AM »

Hello there,

I'm not sure if you got it figured out or not, but I was just doing that very thing today. It was not Verilog, but just VHDL.

No mater which, the process should be the same though.  I used this site: http://fpgacenter.com/examples/counter1/project.php
to help me figure it out.

Just some copying and some pasting will be needed, or it sounds like you already have the code and just want to simulate it.

Just go to tools, select "new macro wizard" after it opens select the radio button for "From File", then click on the folder icon to the right, and locate your file.  Make sure you select the correct file extension of: ".VA" or you wont be able to see the file.

After that, click next, then save it. from that point you should be able to use the insert button on that window (form) that is still open.  once you do that, just click on the schematic to place it... 

And there you go, all done
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