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Author Topic: Simple question about HDL  (Read 2553 times)
pixchips
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« on: May 19, 2014, 11:49:37 AM »

I upgraded to Tina 10 a couple months ago.  Been having trouble with generic digital library, so I thought I'd try to use HDL (VHDL or Verilog).  I can place a block from the library and open it to see the code.  But when I try to simulate it just says, "HDL Analysis not allowed." 

Did my upgrade not include HDL?  If so, how do I get it?

Thx,
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horvatht
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« Reply #1 on: May 20, 2014, 01:21:19 AM »

Do you have the HDL add-on? (If the HDL add-on is enabled you can see a capital H in the About box /Help.About/ next to the full version number)

If the HDL add-on is not active, you can simulate VHDL blocks only, no other HDL block is allowed.
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pixchips
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« Reply #2 on: May 22, 2014, 05:32:44 PM »

Just figured that out.  I now have the full HDL upgrade.  But i still need somebody to point me to a tutorial or explanation of how this is supposed to work.  I placed a block from the HDL tab and tried to run it but I just don't know what I'm doing.  I can't display results, it won't take a clock generated by an analog block.  Clearly i need some remedial startup info.
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