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Author Topic: Include directories for multi-file Verilog models  (Read 923 times)
etl17
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« on: December 21, 2016, 01:58:34 PM »

Hi there,

Is there any way to specify include directories for Verilog files?
It seems that both the project directory or the directory where the top level .v file is located are not searched for included .v files

--Stefanos
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horvatht
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« Reply #1 on: January 11, 2017, 02:28:17 AM »

The Verilog include directory is the <TINADIR>/Vhdl/Packages folder where <TINADIR> is that folder where Tina is installed.
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